Portable information equipments have become smaller and lighter. This has necessitated high density mounting of semiconductor apparatuses. In response to this need, semiconductor apparatuses that can be mounted at high density, such as CSP (Chip Size Package) and BGA (Ball Grid Array), have been employed in recent years.
A method of producing the semiconductor apparatuses includes the following plural steps: mounting a semiconductor device on a circuit board provided with a wiring layer; placing a mold on the outside of the semiconductor device; and pouring epoxy resin or the like into the mold to form a resin sealing layer so as to cover the semiconductor device.
In a common method of producing the semiconductor apparatus, a plurality of semiconductor apparatuses are formed at one time on a batch substrate through the foregoing processes, and then the batch substrate is cut so as to be diced into individual pieces of semiconductor apparatuses.
Further, there is a structure called POP (Package on Package), which allows higher density mounting of semiconductor apparatuses. Specifically, semiconductor apparatus packages are stacked so that higher density and systematization are achieved.
FIG. 19 is a sectional view showing an exemplary POP structure.
For example, an upper package of a memory package is stacked on a lower package of a logic package so that higher density and systematization are realized.
In order to do so, a lower semiconductor apparatus package 2 (this package will be referred to as “lower package 2” hereinafter) needs to include a stacking pad 3, constituted of a land provided on a circuit board, for an upper semiconductor apparatus package 1 (this package will be referred to as “upper package 1” hereinafter) to be mounted.
The upper package 1 and the lower package 2 are electrically connected by the stacking pad 3 of the lower package 2 and a connecting bump 27 of the upper package 1.
Further, a surface of the lower package 2, on which surface a semiconductor device is mounted, is roughly divided into two sections: a section where the semiconductor device mounted on the substrate is sealed with resin (this section will be referred to as “resin sealing section 28” hereinafter); and a section where the substrate that is not sealed with the resin is exposed (this section will be referred to as “exposed section 29” hereinafter).
Normally, the stacking pad 3 provided to the lower package 2 is formed outside of the resin sealing section 28 of the semiconductor apparatus.
The following are two possible positional relationships between the resin sealing section 28 and the stacking pad 3.
FIGS. 20 and 21 are sets of a plan view and a sectional view showing a positional relationship between the resin sealing section and the stacking pad 3 in the lower package 2.
In FIG. 20, the resin sealing section, where the semiconductor apparatus is sealed with the sealing resin 4, is formed at the center of the circuit board, and the stacking pad 3 is provided so as to surround the semiconductor apparatus along a periphery of the resin sealing section.
In FIG. 21, the circuit board is divided into three stripe zones The central zone is the section of the sealing resin 4 with which the semiconductor device is sealed. The stacking pad 3 is provided in each of the side zones.
When the resin sealing sections of the semiconductor apparatus packages shown in FIGS. 20 and 21 are formed by molding, the sealing resin 4 seeps over the circuit board through a gap between the mold and the circuit board. In this case, a thin insulating material called a thin resin film 5 of resin is formed outside of an edge of an original resin sealing section (this edge will be referred to as “sealing-resin edge” hereinafter).
In FIGS. 20 and 21, the lower packages 2 and 31 of the POP structure, in which semiconductor apparatus packages are stacked, are shown.
If the upper package is stacked with the thin resin film 5 covering the stacking pad 3, electrical connection between the upper package 1 (see FIG. 19) and the lower packages 2 and 31 becomes poor.
In view of the problems of the thin resin film, Japanese Unexamined Patent Publication No. 317472/1999 (Tokukaihei 11-317472) (publication date: Nov. 16, 1999) suggests not a POP structure but the method for preventing the thin resin film 5. Specifically, as shown in FIG. 22, the method includes forming the protrusion 25 on the circuit board with the use of insulating material such as solder resist, and pressing the mold against the protrusion 25 to eliminate gaps.
FIG. 22 is a sectional view showing a semiconductor apparatus produced so as to have the protrusion 25 to prevent the thin resin film.
There are, however, the following problems with the method in which the protrusion 25 is formed on the circuit board to prevent the thin resin film 5.
(1) In the case of the semiconductor apparatus package including the stacking pad 3 as shown in FIGS. 20 and 21, the edge of the mold needs to be positioned in between the stacking pad 3 and the protrusion 25 (see FIG. 22). It is, however, difficult especially in the case of high-density semiconductor apparatus package (the space between the stacking pad 3 and the protrusion 25 is narrow) to produce the semiconductor apparatus in such a manner as to form the protrusion 25 inside of the mold as shown in FIG. 22, because the position of the sealing-resin edge varies owing to a tolerance of the circuit board.
Therefore, with the semiconductor apparatus package, such as the POP structure, including the resin sealing section and the section where the land is provided on the substrate exposed from the resin sealing section, it is not possible to form the protrusion for preventing the seepage of the resin from the resin sealing section. This raises the problem of poor electrical connection resulting from the thin resin film seeping and covering the land section on the substrate that is exposed.
The problem is not the presence of the thin resin film, which is formed of the sealing resin having seeped from the resin sealing section, but the fact that the sealing resin having seeped covers the land on the substrate exposed from the resin sealing section.
(2) Further, with regard to the method of producing the semiconductor apparatus package, if the protrusion is to be formed with the use of insulating material such as solder resist, one additional photolithography process of applying solder resist to the substrate to form a film becomes necessary. This results in increase of production costs.
It is thus necessary to establish a way to produce the semiconductor apparatus package, by which the thin resin film having seeped from the resin sealing section is prevented from covering the land on the substrate exposed, without an additional process.
Further, if the semiconductor apparatus package shown in FIG. 21 is to be produced by dicing the batch substrate into individual pieces, the following problems arise if the thin resin film is formed on the cutting lines.
FIG. 23 is a set of a plan view, a perspective view, and a sectional view showing the process of dicing the batch substrate into semiconductor apparatus packages.
As shown in FIG. 23, normally the surface sealed with resin is attached, and the batch substrate is cut from a rear surface of the package (surface on which the bump 15 is mounted), with a dicing blade 6 formed of a circular diamond grindstone for cutting the wafer at high-speed rotation.
In the process of cutting the batch substrate with the dicing blade 6, a strip of shred 7 (e.g. solder resist, wirings of the substrate) is produced easily owing to a situation in which the batch substrate is cut with nothing supporting the lower side, which is the front surface of the package and the surface sealed with resin (i.e. the lower side is in midair).
If no thin resin film 5 is on the cutting line of the batch substrate, the shred 7 is cut off from the substrate and drained away by water discharged with respect to sections having been cut. Thus, the shred 7 does not adhere to an outer edge of the package.
If, however, there is the thin resin film 5 on the solder resist on the cutting line when the batch substrate is cut, the thin resin film 5 peels off from the solder resist by the cutting load (downward), owing to weak adhesive force between the thin resin film 5 and the solder resist. Because the substrate is cut with nothing supporting the lower side, the thin resin film S thus peeled off falls toward the surface sealed with resin and the inside of the package. Thus, it is not possible to cut off the thin resin film 5, and the thin resin film 5 adheres to the outer edge of the package. This is a problem.
In the process of cutting the batch substrate, if the batch substrate is cut along A-A′ while there is the thin resin film 5 formed of resin having seeped from the sealing-resin edge, the thin resin film 5 adheres to the outer edge of the package. This lets the shred 7 adhere to the outer edge of the semiconductor apparatus package, as shown in the figure.
FIG. 24 shows the shred 7 adhering to the circuit board that is diced. As shown in this figure, the thin resin film 5 that is not cut off on the cutting line of the batch substrate protrudes from the outer edge of the circuit board, and the shred 7 adheres to the thin resin film 5 thus protruded.
In the worst cases, the shred 7 thus adhered may cause poor connection in the electrical connection using the land in the semiconductor apparatus package including the substrate having the land in the exposed section.